ENGR 12 - Digital Logic Design

Recent Professors: G. Klar
Recent Semesters: Spring 2027, Fall 2026, Spring 2026
Class Size: 24 students
Difficulty: 5.6Moderateout of 10
Credits: 4
Spring 2027 Sections: View Spring 2027 sections of ENGR 12
Transfers To: CSU
Description: Introductory course in the fundamentals of designing digital computer hardware. Course covers: logic gates, binary number system, conversion between number systems, Boolean algebra, Karnaugh maps, combinational logic, digital logic design, flip-flops, programmable logic devices (PLDs), counters, registers, memories, state machines, designing combinational logic and state machines into PLDs, and basic computer architecture. Lab assignments are design oriented. (A, CSU, UC)
Usually Held: Wed 9:00am–11:50am, Mon Wed 10:30am–11:50am, Mon Wed 9:00am–10:20am